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Video Tutorials on several key aspects of TRACE32 solutions are available on official YouTube channel of Lauterbach.
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  PowerDebug USB 3  
  Highlights  
 
 
  • USB3.0 interface to all hosts
  • Connects to target via TRACE32 Debug Cable or TRACE32 CombiProbe, which provide debug support for almost 100 core architectures, such as ARC, Cortex-A/-R/-M, Power Architecture, RISC-V, TriCore, Xtensa
  • Trigger connector to send and receive trigger pulses

 

 
     
  Configuration Overview  
     
   
     
 
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  PowerDebug Pro  
  Highlights  
 
  • USB3.0 and Gigabit Ethernet interface to all hosts
  • Connects to target via TRACE32 Debug Cable or TRACE32 CombiProbe, which provide debug support for almost 100 core architectures, such as ARC, Cortex-A/-R/-M, Power Architecture, RISC-V, TriCore, Xtensa
  • PODBUS Express interface to TRACE32 trace extension modules PowerTrace II / III and PowerTrace Serial, which provide off-chip trace support for all common standardized and proprietary trace protocols
  • Trigger connector to send and receive trigger pulses
 
 

 

 
     
  Configuration Overview  
     
   
     
 
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  Trace Extensions  
  PowerTrace Serial  
 

 

 

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  • 4 GByte trace memory
  • Universal module that is prelicensed for a trace protocol on delivery
  • Additional trace protocol licenses can be added
  • Up to 12.5 Gbit/s per lane
  • Maximum bandwidth of 100 GBit/s
  • Aurora-based trace protocols up to 8 RX lanes
  • PCIe 3.0-based trace protocol up to 8 RX/TX lanes
  • Reference-clock and bit-clock support
  • Fast trace upload to the host computer
  • Support for TRACE32 Streaming up to 400 MByte/s
  • Includes Standard Probe (17 digital channels)
 
     
  PowerTrace III  
     
 
  • 8 GByte trace memory
  • Fast trace upload to the host computer
  • Maximum bandwidth of 19.2 GBit/s
  • Universal trace module, connect to target via TRACE32 AutoFocus II or serial preprocessor
  • Support for parallel trace ports with up to 32-bit
  • Support for serial trace ports up to 4 lanes
    Support for TRACE32 Streaming up to 400 MByte/s
  • TRACE32 Mixed-Signal Probe included (12 digital channels, 6 single-ended voltage channels, 2 current sense channels)

 

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  PowerTrace II  
     
 

 

 

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  • 1, 2 or 4 GByte trace memory
  • Fast trace upload to the host computer
  • Maximum bandwidth of 19.2 GBit/s
  • Universal trace module, connect to target via TRACE32 AutoFocus II or TRACE32 Serial Preprocessor
  • Support for parallel trace ports with up to 32-bit
  • Support for serial trace ports up to 4 lanes
  • Support for TRACE32 Streaming up to 180 MByte/s, compression allows higher data rates to be achieved
  • Includes Standard Probe (17 digital channels)
 
     
  PowerTrace II LITE  
     
 
  • 512 MByte trace memory
  • Fast trace upload to the host computer
  • Maximum bandwidth of 10.8 GBit/s
  • Universal trace module, connect to target via TRACE32 AutoFocus II or TRACE32 Serial Preprocessor
  • Support for parallel trace ports with up to 32-bit
  • Support for serial trace ports up to 4 lanes
  • Support for TRACE32 Streaming up to 50 MByte/s

 

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  Debugger Features  
     
 

 

 

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  • Multicore Debugging
  • Peripheral Browser
  • FLASH Programming (Memory-Mapped)
  • FLASH Programming (Protocol-Based)
  • HLL Debugger
  • Sample-based Profiling
  • MMU Support
  • UEFI Bootloader
  • Hypervisor-aware Debugging
  • OS-aware Debugging
  • Android Debugging

 

 
     
  Multicore Debugging  
     
 
  • Debugger for all cores of a multicore chip
  • Debugging of application cores, DSPs, accelerator cores and special-purpose cores
  • Debugging of more than 80 core architectures
  • Support for every multicore topology
  • Support for all multicore operation modes
  • Support for AMP and SMP systems
  • Single debug hardware can be licensed for all cores of a multicore chip

 

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  Logical Display of Peripherals  
     
 

 

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  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field

 

 
     
  FLASH Programming (Memory-Mapped)  
     
 
  • Optimum flash programming performance
  • Support for all file formats
  • Ready-to-run flash scripts
  • Ready-to-use flash programming algorithms
  • Dialog- or command-based programming as well as full scripting
  • Full awareness of sensitive data
  • Flash declaration via CFI
  • Easy handling of different flash types on a target
  • Software breakpoints in flash
  • Simple code patching in flash
  • Flash programming via boundary scan

 

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  FLASH Programming (Protocol-Based)  
     
 

 

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  • Optimum flash programming performance
  • Support for elf, Intel hex and S-record format
  • Ready-to-use flash programming scripts
  • Ready-to-use flash programming algorithms
  • Memory dump for displaying the flash content
  • Flash content can be easily copied and modified
  • Flash programming via boundary scan (SPI, eMMC, I2C)
  • Full programming access to spare area (NAND)
  • Bad block treatment (NAND)
  • ECC generation: Hamming, BCH, Reed-Solomon (NAND)

 

 
     
  High-Level-Language Debugging  
     
 
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
    Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation

 

 

 

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  Sample-based Profiling  
     
 

 

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  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more

 

 
     
  MMU Support  
   
     
 
  • Full integrated support of processor's MMU
  • Display of processor MMU registers
  • Display of MMU table entries
  • Display of address translation table
  • 'Shadowing' MMU address translation inside debugger
  • Full virtual and physical access to target at any time
  • Debugger has optionally write access to write protected memory areas
  • Detection and decoding of software MMU tables built by operating systems
  • Support for several user space MMU tables side by side
  • TLB context tracking and git statistics via CTS
 
     
 
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  Debug Support for Unified EFI Bootloader  
     
 
  • Support by a loadable extension
  • Debug support for all UEFI phases
    Tailor-made display windows for each UEFI phase
  • Continuous solution without "debug gap"
  • Debugging from reset vector
  • Debugging of dynamically loaded drivers from their entry point

 

 

 

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  Hypervisor-aware Debugging  
     
 

 

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  • Seamless debugging of the total system in stop-mode
  • Hypervisor-awareness as a loadable debug extension is provided by Lauterbach
  • Machine ID allows the user to uniquely identify any virtual machine in the system
  • Machine ID provides full visibility of context of active and inactive virtual machines
  • OS-awareness can be loaded for each virtual machine

 

 
     
  OS-aware Debugging  
     
 
  • Real-time, non-intrusive display of RTOS system resources
  • Task stack coverage
  • Task related breakpoints
  • Task context display
  • SMP support
  • Task related performance measurement
  • Statistic evaluation and graphic display of task run times
  • Task related evaluation of function run times
  • PRACTICE functions for OS data
  • Easy access via RTOS specific pull-down menus
  • Support for all major RTOSes

 

 

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  Android Debugging  
     
 

 

 

 

 

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  • Stop-mode-debugging for ARM
  • Support for Android L/M/N
  • Debug information from Elf/DWARF file or by parsing the OAT data
  • Full Android and OS-aware interpretation based on RAM dump on TRACE32 Debugger or on TRACE32 Instruction Set Simulator
  • Android L/M
  • Native Debugging of Android Framework and Apps (ahead-of-time compilation)
  • Android N
  • Display of the frame levels with Java-to-native transitions for interpreted code
  • Native debugging of ahead-of-time and just-in-time compiled code
  • Requires Linux OS-awareness
 
     
 
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