The DS-5 IDE provides utilities such as the Platform
Configuration Editor (PCE), which uses JTAG for
auto-detection of your platform. Whilst modern SoCs will
usually require some extra manual configuration, the
initial scan will usually uncover several of the debug and
trace elements, giving you a head start.
Debug and Trace Service Layer
Modern SoCs with complex multi-cluster, multicore
arrangements, combining Arm IP with 3rd party IP blocks and
modular trace architecture need a new approach to
By auto-detecting the debug components in your SoC via DSTREAM,
the Debug Hardware Configuration tool in DS-5 builds the
Jython script for you. This can then be modified to support
additional IP blocks, giving you convenience and
DSTREAM provides visibility into Arm processors, with 9.6 Gbps parallel trace or 20 Gbps serial trace, 4 GB trace buffer, system autodetection with DS-5 and a range of target connectors including JTAG, MICTOR and CoreSight.
DSTREAM-ST visibility into Arm processors, with 2.4 Gbps parallel trace over 4 pins, streams trace data directly to host PC, system autodetection with DS-5 and a range of target connectors including JTAG, MICTOR and CoreSight.S
Trace in DS-5 is extremely powerful, giving you a
non-intrusive way to sort out hard-to-find bugs when it's
simply not practical to stop and start a core repeatedly.
To cope with the complex trace topologies of modern
systems, DS-5 allows you to set and configure trace start,
stop and trigger points.
In DS-5 Debugger, trace-points can be set from the Arm
assembly editor, C/C++ editor, disassembly view, functions
view, memory view or trace view.